The following syllabus gives you a rough idea of the time spent on each topic. The syllabus
may change depending on how quickly or slowly we move. Regardless, the tests and exams will
be on the dates shown. Make any travel plans accordingly.
| Week |
Topics |
Assignments & Exams |
Supplement Materials |
|
Week 1: 08/31
|
Course introduction;
Instruction Set Architecture: ISA design;
|
|
Video 1: Intro: What is Comp
Arch?
Video 2: Intro: Why learn Comp
Arch? And Architecture Types by Application
Video 3: Intro: Moore's Law
and Dennard Scaling
Video 4: Intro: Design
Metrics
Video 5: Intro: Theoretical
Architectures
Video 6: ISA: Intro
Video 7: ISA: Operands
Video 8: ISA: Addressing Modes
Video 9: ISA: Instruction
Length and Operand Count
|
|
Week 2: 09/07
|
Instruction Set Architecture: impact on design;
Computer Arithmetic: binary representations;
|
Assignment 1: Reserve Engineering due.
|
Video 10: ISA: Good/bad ISAs
Video 11: ISA: CISC vs RISC
(part 1)
Video 12: ISA: CISC vs RISC
(part 2)
Video 13: ISA: SIMD
Video 14: ISA: VLIW
Video 15: ISA: Compiler Interaction
|
|
Week 3: 09/14
|
Computer Arithmetic: math in binary;
Computer Arithmetic: transistors;
|
|
Video 16: Comp Arithmetic:
Binary/Hex Numbers
Video 17: Comp Arrithmetic:
Two's Complement Encoding
Video 18: Comp Arrithmetic:
Floating-point number Encoding
Video 19: Comp Arrithmetic:
Basic ALU Design
|
|
Week 4: 09/21
|
Computer Arithmetic: ALU design;
Performance Models and Metrics
|
|
Video 20: Perf. Measurement:
Perf. Metrics (part 1)
Video 21: Perf. Measurement:
Perf. Metrics (part 2)
Video 22: Perf. Measurement:
CPU Perf. Equation
Video 23: Perf. Measurement:
Amdahl's Law
Video 24: Perf. Measurement:
Benchmarks
Video 25: Perf. Measurement:
Simulators
|
|
Week 5: 09/28
|
Basic CPU Implementation
|
Assignment 2: Performance Metrics Due
|
Video 26: Basic CPU: Five
Exec Stages
Video 27: Basic CPU: Cycles
and Control Signals
Video 28: Basic CPU: ALU
Data Path (part 1)
Video 29: Basic CPU: ALU
Data Path (part 2)
Video 30: Basic CPU: Memory
data Path
Video 31: Basic CPU: Branch
Data Path
Video 32: Basic CPU: All in
One Picture
Video 33: Basic CPU: Control
Signals and Multi-Cycle Impl.
Video 34: Basic CPU:
Execptions and Micro-programming
|
|
Week 6: 10/05
|
Instruction Level Parallelism: Pipelines;
|
Midterm Exam 1 on 10/05th, in class,
Midterm1 Preparation
|
Video 35: Intro to Pipelining
Video 36: Structural Hazards
Video 37: Data Hazards (part 1)
Video 38: Data Hazards (part 2)
Video 39: Control Hazards
Video 40: Hazards Summary and Superscalar
|
|
Week 7: 10/12
|
Instruction
Level Parallelism: Branch Prediction;
Out-of-Order Execution: Scoreboard
|
Assignment 4: Assembly Programming Due;
|
Video 41: Speculative Execution: Introduction
Video 42: Speculative Execution: 2-Bit Counter
Video 43: Speculative Execution: Adv Branch Prediction
Video 44: Speculative Execution: Memory Disambiguation
Video 45: Speculative
Execution: Security Implications
Video 46: Intro t`o OoO Execution
Video 47: Scoreboard Algorithm
Video 48: Scoreboard Example (part 1, to cycle 10)
Video 49: Scoreboard Example (part 2)
Video 50: Scoreboard Limitations
|
|
Week 8: 10/19
|
Out-of-Order Execution: Tomasulo Algorithm;
Out-of-Order Execution: Reorder Buffer
|
|
Video 51: Tomasulo: Register Renaming
Video 52: Tomasulo Algorithm
Video 53: Tomasulo: Example (part 1, to cycle 10)
Video 54: Tomasulo: Example (part 2)
Video 55: Tomasulo: Wrapup
Video 56: Reorder Buffer: Introduction
Video 57: Reorder Buffer: Example (part 1, to cycle 10)
Video 58: Reorder Buffer: Example (part 2)
Video 59: Reorder Buffer: Summary
|
|
Week 9: 10/26
|
Limitations on ILP
Introduction to
Cache
|
Assignment 5: Pipelining due;
|
Video 60: ILP Limitations (part 1)
Video 61: ILP Limitations (part 2)
Video 62: ILP Limitations (part 3)
Video 63: Thread-level Parallelism (part 1)
Video 64: Thread-level Parallelism (part 1)
Video 65: Overview of Cache (part 1)
Video 66: Overview of Cache (part 1)
Video 67: Overview of Cache: Program Locality
Video 68: Overview of Cache: Terminologies
Video 69: Basic Cache Questions
Video 70: A Simple Cache Example
Video 71: Cache Perf. Equations
|
|
Week 10: 11/02
|
Cache Designs
Project Information;
|
Assignment 6: Out-of-order Execution Due.
|
Video 72: Introduction and Cacheline Addresses
Video 73: Direct Mapped Cache
Video 74: Direct Mapped Cache Example
Video 75: Direct Mapped Cache Pros/Cons
Video 76: Fully Associative Cache Introduction
Video 77: Fully Associative Cache Example and Pros/Cons
|
|
Week 11: 11/09
|
Cache Designs
|
Midterm Exam 2 on 11/09th, in class
Midterm2 Preparation
|
Video 78: Set-Associative Cache Introuction
Video 79: Set-Associative Cache Example and Pros/Cons
Video 80: Set-Associative Cache Number of Ways Determination
Video 81: Compulsory, Capacity and Conflict Cache Misses
|
|
Week 12: 11/16
|
Cache Designs
|
|
Video 82: Cache Replacement Policy - LRU
Video 83: Cache Replacement Policy - CAR
Video 84: Write-back Policy
Video 85: Write-through Policy
Video 86: Write miss Policies and Real Cache Examples
|
|
Week 13: 11/23
|
Parallel Processor: GPU
Bing and
FPGA;Bing
slides;
Brainwave
(FPGA);Brainwave
slides
TPU;slides_v1_2017;slides_v2v3_2019;slides_v2v3_2020
Resource Disaggregation: Berkley Firebox; MS RSC; Microservices; HP: The Machine; Intel RSC; LegoOS
|
|
Last Class.
|
|
Week 14: 11/30
|
Thanksgiving Weekend, no class.
|
|
Project Due on December 5th.
|
|
Final Exam
|
12/07/23, Saturday, 2:00pm-5:00pm
|
Final Preparation
|
|